![snug synopsys snug synopsys](https://www.synopsys.com/content/dam/synopsys/designware-ip/images/devices-tablet-news-2.jpg)
#Snug synopsys how to#
Place-and-route (P&R) tools have done a remarkable job keeping up with the complexity of silicon technologies – determining where to place logic and IP blocks and how to route the traces and interconnects that connect it all. Consider the task of digital implementation, one of the most complex stages of chip design where a great idea begins to take physical shape. So, AI offers a way to scale to meet design and business targets. Yet, it’s becoming practically unfeasible to grow teams to scales that are needed to take on the increased workload of designing these chips, while still maintaining business sustainability. At 46,225mm 2 with 1.2 trillion transistors and 400,000 AI-optimized cores, the Wafer-Scale Engine (WSE) from Cerebras is the biggest chip built so far. Chips are getting larger, especially those for burgeoning applications like AI and high-performance computing and the hyperscale data centers that host them.
![snug synopsys snug synopsys](https://www.synopsys.com/content/dam/synopsys/snug/Community_SNUG_Hero_Spotlight-2.jpg)
Forbes recently wrote, “Now, the chip industry itself has reached a stage where AI is aiding in the design of these AI chips, and it is enabling engineering teams of all sizes to compete at the relentless pace required in the semiconductor industry.” It makes sense. Indeed, the use of AI in chip design is garnering quite a lot of attention these days. AI Takes the Guesswork Out of Chip Design While there is a level of apprehension in our society about machines taking over, using AI in chip design can be a strategy to significantly boost productivity, enhance design performance and energy efficiency, and focus expertise on the most valuable aspects of chip design. That’s what AI brings to chip design-the ability to expand the exploration of choices in chip design so that you can work at a certain level of abstraction. What if chip designers had a way to focus on value-added product features and other differentiating aspects of their designs, without getting bogged down by more manual, menial tasks? Year after year, EDN’s “Mind of the Engineer” study reveals how pressured engineers feel with project workloads, resource constraints, and aggressive time-to-market targets. Has your organization developed its AI strategy for chip design? And that advantage is also providing a productivity boost for chip design. One of the advantages that AI brings is its ability to derive actionable insights quickly from massive amounts of data. Director, Synopsys AI Solutions, Office of the COOĪrtificial intelligence (AI) is touching so many aspects of our everyday lives, from consumer devices to broader applications like drug discovery, climate change modeling, and self-driving cars.